Intel Corporation presented, on Monday (26), its strategic plan for the next five years, with a roadmap of process and packaging innovations that intends to drive new product lines until 2025 to regain leadership in the chip market.
New additions include RibbonFET, Intel’s first new transistor architecture in more than a decade, and PowerVia, an industry first for delivering power through the back of the chip.
The company is also preparing to be the first in the sector to use the latest generation extreme ultraviolet lithography (EUV) technology known as High Numerical Aperture (High NA).
Innovations in processors
Intel’s semiconductor futures will no longer use the nanometer-based node nomenclature that the chip manufacturing industry has established for years. The strategy may even seem like just a marketing job, suggesting competitiveness with models from AMD or Apple.
However, node names haven’t really referred to the size of a transistor on a chip since 1997, due to 3D packaging technologies and the physical realities of semiconductor design.
Check out the nomenclatures of the new releases:
Intel 7: New name for Intel’s third-generation 10nm technology (Alder Lake) and successor to 10nm SuperFin. The new hardware, due to be introduced in late 2021, will offer approximately 10-15% performance improvements per watt compared to the previous generation.
Intel 4: known as Intel’s 7nm (Meteor Lake), had its launch postponed to 2023. It will use the EUV lithograph already used by Samsung and TSMC.
Intel 3: New name for what would have been a second-generation 7nm FinFET processor under Intel’s previous naming scheme. With no official release date, they should only be available on the market in 2024.
Intel 20A: Next-generation Intel technologies that, under the old scheme, would have been the architecture following the 7nm node under the previous brand. It should debut in 2024 with RibbonFET and PowerVia.
Intel 18A: With the second generation of RibbotFET, slated for 2025, Intel hopes to regain chip market leadership.